
Staff Engineer, VLSI Design Engineering
Global-Talent-Exchange
Required Skills:
Cmos Circuit Designs
Finesim
Verilog
Cadence
Synopsis Hspice
Finesim-vcs
Cadence Xcelium
Unix
Solid-State device physics
Cad Tools For Schematics And Verilog Simulations
CMOS circuit design
FINESIM
VERILOG
Cadence
HSPICE
VCS
EXCELIUM
UNIX
Solid-State device physics
Verilog simulations
Job Description
Responsibilities include:
- Designing, modifying and evaluating CMOS circuit structures for advanced high-performance low-power 3-dimensional NAND flash memory.
- Verify designs in simulation and interact with layout, logic and other functional groups for implementation, full chip integration and silicon validation.
- Evaluation of these circuits will be done through FINESIM and VERILOG simulations.
- Collaborate with characterization engineers to fully characterize silicon, and partner with other designers to develop solutions for silicon issues.
- Responsible for full chip silicon evaluation through probing.
- Interact with Memory Device team for transistor models, EDR/GDR requirements and tradeoffs.
- CMOS transistor level design, simulation, layout knowledge of common custom circuits like amplifiers, current mirrors, level shifters, switches, decoders.
- Knowledge of running and debugging Verilog simulations.
- Good understanding of Solid-State device physics.
- Comfortable with IC tools such as Cadence analog design environment, HSPICE/FINESIM, VCS/EXCELIUM, UNIX.
- Ability to troubleshoot and analyze complex problems.
- Excellent communication skills to effectively collaborate with Off-site counterparts across global teams.
Qualifications
- B.E./B.Tech/M.E/M.S/M.Tech in electronics branches.
- Aggregate of 75% & Above in all qualifying exams.
- 4+ years of relevant Industry Experience.
About Company

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