Senior Design Verification Engineer

Senior Design Verification Engineer - AI Hardware - Hybrid from Mountain View, CA

The company is looking for a Senior Design Verification Engineer to join a well-funded startup based out of Mountain View whose hardware promises to drastically change the economics of AI compute for the latest and most demanding models.

Founded by engineers who have been instrumental in the industry’s most successful semiconductor and AI products, this organization is pushing the boundaries for what LLMs can accomplish. With a team comprised of industry veterans, talent and passion are the foundational pillars behind their success.

As a Senior Design Verification Engineer, you’ll own verification execution at the full chip and subsystem level, creating testbenches and executing progress and verification closures toward various silicon milestones. This is a hybrid role based in Mountain View, CA.

This role might be ideal for you if you have:

• Experience driving verification from concept-to-silicon
• 8+ years working in design verification
• Excellent SystemVerilog knowledge
• Experience with Python, C/C++, Bluespec or similar scripting and programming languages for verification and silicon modeling
• Production experience with advanced verification methodologies (UVM, ABV, formal verification, etc.)
• Strong understanding of silicon micro-architecture and design concepts used in high-performance compute, high-speed connectivity, memory management, and related functionalities
• Experience verifying data center/networking chips at subsystem or full chip level.

Familiarity with emulation and prototyping platforms and methodologies and hands-on experience with participation in silicon debugging and bring-up are pluses!

If you're interested in building the future of AI compute, apply here or reach out to the recruiter to discuss further.