FPGA Digital Validation Engineer

We are looking for an experienced FPGA Design & Validation Engineer to join our hardware development team. You will take ownership of the complete FPGA flow, from RTL design through implementation, prototyping, and electrical validation, working closely with another FPGA expert in a highly hands-on lab environment.

This role is ideal for an independent, detail-oriented engineer who thrives on solving complex timing, integration, and hardware validation challenges.

🔧 Responsibilities

• Drive the full FPGA development flow: RTL → Synthesis → Place & Route → Bitstream generation → Board validation
• Adapt and implement designs for FPGA prototyping
• Develop and maintain timing constraints and analyze timing reports in collaboration with the design team
• Ensure timing closure and resolve issues related to:
• Clock domain crossings (CDC)
• Clock generation
• Combinational loops
• Develop RTL in VHDL / Verilog / SystemVerilog
• Perform FPGA and board bring-up, debug, and validation
• Create C-based test software for FPGA testing
• Develop supporting Python tools and scripts
• Use FPGA debug tools for root cause analysis
• Conduct device and board-level electrical validation
• Perform hands-on bench validation using oscilloscopes and logic analyzers
• Work with revision control systems and manage compute jobs

✅ Requirements

• Master’s degree (or equivalent experience) in Electrical Engineering, Computer Engineering, or related field
• Strong experience with Xilinx FPGA flow
• Proven experience with:
• Synplify (synthesis)
• Vivado Place & Route
• Deep understanding of digital design principles
• Solid expertise in timing analysis and closure
• Experience with hardware debug & electronics fundamentals
• Proficiency in C and Python development
• Ability to work independently and take technical ownership
• Strong problem-solving and lab debugging skills

⭐ Nice to Have

• Experience with large-scale FPGA prototyping platforms
• Automated test frameworks
• High-speed interfaces or complex SoC integration
• CI/CD or scripted FPGA flows

Location and Joining date: Belgium and We are searching for candidates who can move in a timeframe of below 1 month