Design Verification Engineer- GPU Diagnostics

Global-Talent-Exchange

Canada

Full time

2 - 5 Yrs

- INR

span 1

Required Skills:

C11

Verilog

DV

FPGA

Verdi

C++

Verilog

DV

FPGA

Verdi

The Role

The Diagnostics team is responsible for developing tests and suites that exercise and validate the hardware blocks in the graphics chips designed at our organization. The successful candidates for this role will support our diagnostics development team, where you’ll gain an understanding of our GPU HW blocks.

We understand the features that go into the HW design, and we have the software skills to program them to life. Once developed these diagnostics are used in all aspects of the product lifecycle, from pre-silicon validation through the production life of the product.

The Person

Diagnostics team requires a C++ or DV engineer to generate ATE patterns to achieve cost-savings, increase yield/die-to-ship and attain early time-to-market.

Daily work involves code development and debug in C++ in DV environment, running and debugging simulations for hardware developed in Verilog, waveform analysis using Verdi and running emulation on FPGA platforms.

You have an important role in ensuring robust diagnostics quality and feature coverage with opportunities to learn about HW features and SW/HW debugging. You will be asked to work across multiple hardware blocks, on different ASICs, and collaborate with teams across the company.

Key Responsibilities

Enable C++ based diagnostics to be run as patterns on Automated Test Equipment (ATE)
Run and debug simulations based on these patterns for hardware developed in Verilog
Debug waveforms in Verdi
Run emulation on FPGA platforms for these patterns
Collaborate closely with design and diagnostics teams to understand and adapt C++ diagnostic algorithms for effective ATE testing.
Develop and optimize new ATE patterns
Troubleshoot and debug ATE patterns, working collaboratively with test engineers and design teams to address issues.
Maintain and enhance existing ATE patterns
Document the conversion process and maintain comprehensive records of ATE patterns and diagnostic algorithms.
Provide technical expertise in C++, Verilog, and DV to support seamless integration of converted patterns into the testing environment.
Collaborate with cross-functional teams to ensure the successful deployment of ATE patterns in production environments.
Contribute to continuous improvements in conversion processes

Preferred Experience

Proven experience in semiconductor industry as a low-level/embedded programmer or Hardware Design/DV engineer
Good knowledge and experience in software programming (C++, scripting)
Good knowledge and experience in Hardware Description Languages such as Verilog
Bonus if candidate has strong GPU architecture knowledge
Self-leadership and independence, along with excellent communication skills

Preferred Education

BS or MS in Computer Engineering or Computer Science

Location

Markham

Benefits offered are described: our organization benefits at a glance.Our organization does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. Our organization and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.