Design Verification Engineer

WHAT YOU DO AT OUR ORGANIZATION CHANGES EVERYTHING

At our organization, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join us, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

The Role

The Data Accelerator (DACC) team at our organization is seeking a Silicon Design Verification Engineer who will be involved in multiple aspects of IP verification. This role is an excellent opportunity to work on next generation technologies that are part of our products powering Servers, Datacenters, Client and Embedded markets. You will join one of the fastest-growing areas of adding custom hardware offload engines to support complex operations like encryption, authentication, compression, GPU/CPU compute offloads & virtual machines live migration. This is a tremendous opportunity to get in early into the rapidly expanding domain of custom hardware accelerators. The Design Verification (DV) group within this team is responsible for developing a scalable DV flow and environment with emphasis on automation (using AI), power and performance verification (PPV) and emulation support. Our management fosters and encourages continuous technical innovation to showcase success as well as continuous career development.

The Person

You have a passion for modern functional verification techniques and are eager to learn new designs and implementation methodologies. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

Key Responsibilities

• Maintain block level IP verification testbenches and infrastructure
• Develop detailed test plans for covering new features
• Develop test case with constraint random stimulus, predictors and scoreboards
• Triage regressions, debug simulations, analyze coverage, work/resolve technical issues with design, verification and other teams to achieve verification closure
• Deploy industry leading verification methodologies such as UVM and formal verification
• Reproduce silicon functional bugs in simulations and/or formal verification tools
• Conduct and participate in code reviews
• Apply AI-driven solutions to streamline and enhance verification processes

Preferred Experience

• Proficient in Verilog, System Verilog, UVM and working in Linux and Windows environments
• Familiarity with formal verification and AI techniques for verification a plus
• Must be able to debug RTL code using simulation tools
• Familiarity with Makefiles, scripting languages like perl, python, ruby etc.
• Excellent programming skills with OOP

Academic Credentials

• Bachelors or Masters degree in Computer Engineering/Electrical Engineering

LOCATION: Markham, ON

Benefits offered are described: our benefits at a glance.

We do not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. We and our subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.