
ASIC Design Verification Engineer
Global-Talent-Exchange
Required Skills:
ASIC verification
RTL debugging
UVM
SystemVerilog
Linux
Windows
Perl
Python
Makefile
Shell scripting
Networking protocols
AI tools
ASIC verification
RTL debugging
UVM
SystemVerilog
Linux
Windows
Perl
Python
Makefile
Shell scripting
Networking protocols
AI tools
Role
As a member of the front-end verification team, you will help bring to life cutting-edge designs and work closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success.
Responsibilities
- Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified.
- Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases.
- Decide on verification and reuse strategy and testbench architecture.
- Estimate the time required to write the new feature tests and any required changes to the test environment.
- Interact with project managers and system level DV teams to coordinate release schedules and feature staging.
- Build the directed and random verification tests.
- Debug test failures to determine the root cause; work with RTL and firmware engineers to resolve design defects and correct any test issues.
- Review functional and code coverage metrics – modify or add tests or constrain random tests to meet the coverage requirements.
Preferred Experience
- Proficient in IP level ASIC verification strategies.
- Proficient in debugging RTL code using simulation tools.
- Expert in the UVM concepts and SystemVerilog language.
- Proficient in architecting UVM testbenches and working in Linux and Windows environments.
- Experienced in developing UVM based verification frameworks and testbenches, processes and flows.
- Comfortable automating workflows in a distributed compute environment.
- Exposure to simulation profile, efficiency improvement, acceleration, formal verification.
- Scripting language experience: Perl, Python, Makefile, shell preferred.
- Exposure to leadership or mentorship is an asset.
- Prior exposure to networking protocols such as Ethernet, UAL, LLR, CBFC is desired.
- Experienced in using AI tools.
Academic Credentials
Bachelors or Masters degree in Computer Engineering/Electrical Engineering or Computer Science.
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