Senior Physical Design Engineer

Loom International

Bengaluru
Full time
5 - 8 Yrs
Job Openings: 1

Required Skills:

Physical Design

Floorplanning

Placement

Clock Tree Synthesis

Routing

Timing Analysis

Power Optimization

Synthesis

Static Timing Analysis

ICC2

Cadence Innovus

RedHawk

TCL

Python

Physical Design

Floorplanning

Power Grid Design

Placement

Clock Tree Synthesis

Routing

Timing Analysis

Power Optimization

Area Optimization

Congestion Reduction

IR Drop Reduction

Crosstalk Reduction

Synthesis

Static Timing Analysis

Design for Testability

Package Design

Tape-out

Synopsys Innovus

ICC2

Cadence Innovus

RedHawk

CTS Architectures

High-speed Layout Techniques

MCMM Optimization

Low-power Design Techniques

TCL

Python

Role Overview

As a Senior Physical Design Engineer, you will own block/top-level execution from netlist to GDSII, meeting aggressive PPA (Power, Performance, Area) targets on advanced technology nodes.

Education Requirements

Degree: B.E. / B.Tech / M.E. / M.Tech in Electronics Engineering, Electrical Engineering, VLSI, or Computer Engineering. (Master's degree preferred)

Key Responsibilities

  • Drive floorplanning, power grid design, placement, clock tree synthesis (CTS), and routing.
  • Analyze and optimize timing, power (static and dynamic), and area across multiple operational modes and corners.
  • Execute congestion, IR drop, and crosstalk reduction strategies during layout implementation.
  • Work with synthesis, STA, DFT, and package design teams to resolve integration issues.
  • Lead block closure and support top-level chip integration and tape-out activities.

Technical Qualifications

  • Experience: 5+ years of hands-on experience in block and top-level Physical Design.
  • Tools: High proficiency in Synopsys Innovus / ICC2, Cadence Innovus, or RedHawk.
  • Nodes: Proven track record of successful tape-outs on 7nm, 5nm, or lower process nodes.
  • Skills: Deep understanding of CTS architectures, high-speed layout techniques, multi-corner multi-mode (MCMM) optimization, and low-power design techniques (UPF/CPF).
  • Scripting: Excellent scripting skills in TCL/Python.