Early Career - SoC Digital Design Engineer (M, F, D)

Global-Talent-Exchange

Munich
Full time
2 Yrs
Job Openings: 1

Required Skills:

SoC design

RTL coding

Verilog

System Verilog

scripting

Python

Perl

C

C++

TCL

synthesis

STA

verification methodologies

SoC design

RTL coding

Verilog

System Verilog

scripting

Python

Perl

C

C++

TCL

synthesis

STA

verification methodologies

Job Description

As a SoC Digital Design Engineer, you will have responsibilities spanning all aspects of the SoC design flow.

Responsibilities

  • Work with the architecture team to develop the microarchitecture spec.
  • Develop RTL for one or more blocks following established design guidelines based on microarchitecture spec.
  • Work on sophisticated design practices such as Clock/Reset/Voltage domain crossing, DFT, Low Power Design, power optimisation, and synthesis.
  • Collaborate closely with the verification team on block/top level to ensure timely delivery of quality designs.
  • Work closely with the physical design team to optimize the design and meet design targets such as area, timing, and power.

Minimum Qualifications

  • Hold an MSEE.
  • Ability to fluently speak and write in English.
  • Some experience in silicon design, RTL coding, block-level simulations, and synthesis.
  • Verilog / System Verilog skills.

Preferred Qualifications

  • Experience with scripting and programming languages such as Python, Perl, C, C++, and TCL is an advantage.
  • Familiarity with various backend tools such as synthesis and STA is an advantage.
  • Familiarity with verification methodologies is an advantage.
  • Experience with microarchitecture definitions at the unit level.

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